covered
Verilog code coverage analysis tool
Install
- All systems
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curl cmd.cat/covered.sh
- Debian
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apt-get install covered - Ubuntu
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apt-get install covered - Kali Linux
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apt-get install covered - Windows (WSL2)
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sudo apt-get updatesudo apt-get install covered - Raspbian
-
apt-get install covered - Dockerfile
- dockerfile.run/covered
covered
Verilog code coverage analysis tool
Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.