verilator_coverage

fast free Verilog simulator

Install

All systems
curl cmd.cat/verilator_coverage.sh
Debian Debian
apt-get install verilator
Ubuntu
apt-get install verilator
Arch Arch Linux
pacman -S verilator
image/svg+xml Kali Linux
apt-get install verilator
Fedora
dnf install verilator
Windows (WSL2)
sudo apt-get update sudo apt-get install verilator
OS X
brew install verilator
Raspbian
apt-get install verilator
Dockerfile
dockerfile.run/verilator_coverage

verilator

fast free Verilog simulator

Verilator is the fastest free Verilog HDL simulator, and beats many commercial simulators. It compiles synthesizable Verilog (not test-bench code!), plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to generate executable models of CPUs for embedded software design teams.